Integrated vibration measurement and analysis system

ABSTRACT

A vibration data collection system performs an integration or differentiation process on incoming digitized vibration data in real time. The system uses a digital Infinite Impulse Response (IIR) filter running at the input data rate to provide the integration or differentiation function. With this approach, the system reduces hardware complexity and data storage requirements. Also, the system provides the ability to directly integrate or differentiate stored time waveforms without resorting to FFT processing methods.

FIELD

This invention relates to the field of machine vibration measurement fordetecting mechanical, electrical, and electromagnetic fault conditionsin an operating machine. More particularly, this invention relates to asystem for performing real-time digital processing of time domainsignals indicative of vibration produced by a machine.

BACKGROUND

Problems with Conventional Analog Integration in Machine MonitoringSystems

Conversion from one type of vibration-related signal (such asacceleration) to another vibration-related signal (such as velocity ordisplacement) is a common requirement for vibration monitoring systems.A typical example is the conversion from acceleration to velocity byintegration of the acceleration signal. Similarly, the oppositeconversion can be performed by differentiating a velocity signal. In thepast, these conversions have been done using analog hardware filters.Such conversions have also been done after data collection, usingsoftware that performs a Fast Fourier Transform (FFT) and operates onthe transformed data in the frequency domain.

An ideal hardware integrator is shown in FIG. 4. This circuit directlyconverts an acceleration (or velocity) signal to velocity (ordisplacement) with a conversion factor proportional to 1/R1×C2.Unfortunately, this circuit is not suitable in practice due to the highDC gain. The circuit quickly saturates due to offset currents andvoltages of the operational amplifier. A more refined approach is shownin FIG. 5, where the addition of R2 and C1 limit the low-frequencyresponse of the operational amplifier to prevent saturation. Theappropriate selection of R1 and C2 gives a direct conversion betweenunits, (e.g. 61.45/f for conversion of acceleration to velocity). Thisapproach converts the signal directly, prior to data acquisition, sothat no additional data processing is required. However, it offers noflexibility in changing the conversion factors and is subject tovariability in hardware component values. Also, it consumes largeamounts of circuit board real estate due to the physically largecomponents required for low-frequency operation.

Another prior art approach to the conversion is to digitize thevibration signal using an analog-to-digital converter (ADC), transformto the frequency domain using FFT methods, and apply integration ordifferentiation on the frequency spectrum. This process is depicted inFIG. 6. Disadvantages of this approach include the lack of ability to dothe conversion process continuously in real-time and the systemcomplexity required to perform the FFT. Also, creation of an integratedtime waveform requires extensive data processing (i.e., forward andinverse FFT computations). Finally, the FFT method assumes the signal isstationary which may not be true for dynamic signal conditions and couldlead to errors in the re-creation of the time domain signal.

What is needed, therefore, is a conversion process that reduces hardwarecomplexity, reduces data storage requirements, and provides for directintegration or differentiation of time-domain vibration waveformswithout resorting to FFT methods.

Problems with Conventional Analog Signal Conditioning in MachineMonitoring Systems

As shown in FIG. 7, a typical vibration analysis channel 50 consists ofan analog front-end 52, an analog-to-digital converter (ADC) 54, and adigital signal processor (DSP) 56 or microcontroller. The analogfront-end 52 usually contains a vibration sensor 58, an input amplifier60, an AC coupling amplifier 62, analog integrator 64, a variable-gainamplifier 66, and a low-pass anti-aliasing filter and high-pass filter68.

Such implementations of front-end signal conditioning functions in theanalog domain cause numerous problems. Calibration is required due tocomponent variations which cause the sensitivity and bandwidth of thesignal path to vary. Analog components require relatively large amountsof space on the printed circuit board, and they consume large amounts ofpower for low-noise designs. They are also somewhat limited in terms ofprogrammability. For systems designed for use in hazardous environments,reduced voltage and capacitor allowances force tradeoffs in noise andbandwidth in the analog signal path.

What is needed, therefore, is a machine vibration measurement system inwhich the front-end signal conditioning functions are performed in thedigital domain, such as in a field programmable gate array (FPGA) orapplication-specific integrated circuit (ASIC), or as an algorithm in adigital signal processor.

A discussion of prior art machinery vibration analyzers will providefurther context for understanding the various advantages of the machinevibration measurement system of the present invention. U.S. Pat. No.5,412,985 to Garcia et. al. (hereinafter “Garcia), U.S. Pat. No.5,633,811 to Canada et. al. (hereinafter “Canada”), U.S. Pat. No.5,965,819 to Piety et. al. (hereinafter “Piety”), and US 2006015738A1 toLeigh (hereinafter “Leigh”) are representative of such prior artmachinery vibration analyzers.

Garcia et. al. discloses using either an IIR or FIR filter in amachinery vibration analyzer. It incorporates analog signalconditioning, including integration, and it requires anti-aliasingfiltering before analog-to-digital conversion.

Canada describes a machinery vibration analyzer having analog signalconditioning, including analog integration, direct-current (DC) offset,gain control, and a fixed frequency low-pass anti-aliasing filter. Inaddition to this analog circuitry, the disclosure teaches about digitalfiltering, decimation, and sigma-delta noise shaping.

Piety describes parallel processing in a vibration analyzer wherein ananalog sensor signal representing a measured property of an operatingmachine is split and simultaneously processed through at least twoparallel circuits. Each of these circuits has input filters,integrators, DC offsets, amplifiers, and circuit filters prior toparallel analog-to-digital conversion. Each parallel circuit is capableof performing different types of signal analyses with varying analogsignal conditioning and sampling rate requirements.

Leigh describes machinery vibration analysis that involves derivingmultiple types of vibration signals from one vibration signal andselecting a digital acceleration signal or first digital integration toconvert a digital acceleration signal to a velocity signal or a firstdigital integration to convert a digital acceleration signal to avelocity signal followed by a second digital integration to convert avelocity signal to a displacement signal in a machinery vibrationanalyzer. The vibration analyzer according to Leigh incorporates analogsignal conditioning acting on the analog signal from an accelerometer,including scaling, DC offset, and anti-alias filtering. Leigh requiresselection of a sampling frequency before digitizing the analogacceleration signal using an analog-to-digital converter (ADC).

The machinery vibration analyzers disclosed by Garcia, Canada, Piety,and Leigh do not teach about the following elements found in certainembodiments of the present invention:

-   (a) fixed analog-to-digital sampling rate in an analog-to-digital    converter;-   (b) flexible field programmability for a parallel vibration signal    processing circuit;-   (c) parallel vibration signal processing in an FPGA;-   (d) a parallel vibration signal processing in an ASIC;-   (e) an ideal integrator transfer function using a difference    equation;-   (f) a synthesized sampling rate using an arbitrary resampler;-   (g) a digital filter to remove a direct current (DC) component from    a vibration signal;-   (h) switch control circuitry for switching between a    non-rechargeable battery and an energy harvester power source;-   (i) a digital implementation of an anti-aliasing filter;-   (j) a digital implementation of a scaling circuit;-   (k) replacement of a traditional analog signal conditioning    component calibration with a digital design that does not require    analog calibration;-   (l) a single-step double integrator in the digital domain that    converts an acceleration signal to a displacement signal; and-   (m) a field programmable switching device that is operable to direct    any one of a plurality of digital vibration inputs to any one of a    plurality of outputs.

U.S. Pat. No. 5,696,420 to Inanaga et. al. (hereinafter Inanaga) andU.S. Pat. No. 7,164,853 to Tomita (hereinafter Tomita) describecontrolling devices for detecting a motion of the device itself.

Inanaga describes a control device for detecting a swinging motion of aperson's head wearing audio headphones. The Inanaga device uses avibration type gyroscope that reads a control signal and controls anaudio signal to create virtual sound source positioning in reference toa direction of the listener wearing headphones. Inanaga teaches using adigital integrator and digital differentiator with a digital filter,such as an infinite impulse response (IIR) digital filter, finiteimpulse response (FIR) digital filter, or the like. The vibration typegyroscope of Inanaga is a control device and not a measurement apparatuslike the present invention. For example the following features that arerequired for the Inanaga apparatus are not required for the presentinvention (that is, these features may be avoided individually orcollectively with the present invention):

-   (a) an amplitude-modulated detection signal is converted into a    digital signal;-   (b) a modulated analog piezoelectric signal output is demodulated to    obtain a correct detection output;-   (c) piezoelectric elements are integrated into the apparatus body;-   (d) a pair of piezoelectric elements are used for detection, and a    pair of piezoelectric elements are used for driving, and a    differential amplifier is used for obtaining a differential output    between output signals of the pair of piezoelectric elements for    detection; and-   (e) a control signal is supplied from the outside.

Tomita describes a vibration correcting optical control device. Thisdevice detects vibration caused by hand movement or the like to providecontrol for correction of optical blur. This disclosure mentions using alow pass filter such as an FIR filter or an IIR filter. The disclosurealso teaches a digital integrating operation unit. The disclosureaccording to Tomita requires multiple things that are not required inthe present invention (that is, these features may be avoidedindividually or collectively):

-   (a) an angular speed sensor capable of detecting coriolis force;-   (b) a vibration detection and signal processing unit;-   (c) a reference value calculation unit;-   (d) determination of an abnormal vibration indication is required    before performing an integration or a differentiation; and-   (e) a drive signal calculation unit.

Furthermore, a chasm of undisclosed applications exists between theInanaga and Tomita control devices and the machinery vibration analyzerof the present invention. Even if the disclosures of Inanaga and Tomitaare combined, the combination fails to describe or suggest severalimportant features of various embodiments of the present invention, suchas:

-   (a) measuring a vibration signal that is indicative of the vibration    level of a machine;-   (b) measuring a parameter of a machine that is indicative of a    machine fault condition or machine performance;-   (c) sensing an acceleration parameter of a machine;-   (d) field programmability;-   (e) FPGA processing;-   (f) ASIC processing;-   (g) selections;-   (h) removing a DC signal component;-   (i) sampling an analog vibration signal at a fixed sampling rate;    and-   (j) synthesizing other sampling rates from a fixed sampling rate.    Besides those listed here, there are many other examples of features    desired for machinery vibration analysis that are not provided by    Inanaga or Tomita.

SUMMARY

The above and other needs are met by a vibration data collection systemthat performs the integration or differentiation process on incomingdigitized vibration data in real time. The system uses digital InfiniteImpulse Response (IIR) filters running at the input data rate to providethe integration or differentiation function. With this approach, thesystem reduces hardware complexity and data storage requirements. Also,the system provides the ability to directly integrate or differentiatestored time waveforms without resorting to FFT processing methods.

In one preferred embodiment, the invention provides a real-time signalconversion apparatus for use in measuring vibration levels of a machinethat are indicative of machine fault conditions. The signal conversionapparatus includes a sensor for measuring an analog signal that isindicative of a mechanical or electrical or electromagnetic faultcondition of an operating machine. Some example fault conditions includemechanical imbalance, misalignment, bent shaft, soft foot, looseness,resonance, broken rotor bar, broken gear tooth, bearing defect, oilwhirl, oil whip, phase imbalance, and turn-to-turn short circuit.Typically the sensor is a vibration sensor such as an accelerometer orvelocity transducer or proximity probe, and occasionally the sensor is amotor flux coil or a current clamp. In addition to these dynamic signalmeasuring transducers, some embodiments use more static sensors,typically providing 0 to 5 V or 4 to 20 mA outputs, to measure an assethealth characteristic such as a thickness, a temperature, a corrosioneffect, or a material property. An analog-to-digital conversion (ADC)circuit samples the analog signal at an input data rate to convert theanalog signal into a first digital signal. A digital infinite impulseresponse filter receives the first digital signal at the input data rateand performs a mathematical operation at the input data rate on thefirst digital signal to generate a second digital signal substantiallyin real time. The second digital signal is indicative of the conditionof the machine, and the mathematical operation is selected from thegroup consisting of an integration operation and a differentiationoperation.

In another aspect, the invention provides a method for measuringvibration characteristics of a machine that are indicative of faultconditions of a machine. In a preferred embodiment, the method includes:

-   (a) sensing vibration of the machine and generating an analog    vibration signal based on the sensed vibration;-   (b) sampling the analog vibration signal at a fixed sampling rate to    generate a first digital vibration signal;-   (c) synthesizing other sampling rates based on the fixed sampling    rate of the first digital vibration signal, thereby eliminating any    need for an anti-aliasing filter;-   (d) high-pass filtering the first digital vibration signal to remove    direct current (DC) components; and-   (e) performing a first mathematical operation on the first digital    vibration signal to generate a second digital vibration signal that    is indicative of the vibration characteristics of the machine,    wherein the first mathematical operation is selected from the group    consisting of an integration operation and a differentiation    operation.

In preferred embodiments, no signal conditioning step, such as gainamplification, DC removal, anti-aliasing filtration, or high-passfiltration, is performed between the vibration sensing step (a) and thesampling step (b).

In yet another aspect, the invention provides a real-time signalconversion apparatus for use in measuring vibration characteristics of amachine that are indicative of machine fault conditions. The signalconversion apparatus of one embodiment includes a vibration sensor forsensing vibration of the machine and generating an analog vibrationsignal based on the sensed vibration, where the analog vibration signalis indicative of a fault condition of the machine. An analog-to-digitalconversion (ADC) circuit samples the analog vibration signal to generatea first digital vibration signal. A digital high-pass filter filters thefirst digital vibration signal to remove direct current (DC) components.A digital infinite impulse response filter performs a mathematicaloperation on the first digital vibration signal to generate a seconddigital vibration signal that is indicative of the vibration level ofthe machine, where the mathematical operation is selected from the groupconsisting of an integration operation and a differentiation operation.In this embodiment, the analog vibration signal is provided to theanalog-to-digital conversion circuit without gain amplification andwithout anti-aliasing filtration.

In alternative embodiments, instead of using a vibration sensor tocollect machine vibration information and to produce an analog signalrevealing mechanical fault conditions, a flux coil sensor or a currentclamp sensor is used to measure machine electromagnetic information andto produce an analog signal revealing motor rotor and motor statorfaults. Further, a current clamp type sensor or other sensor capable ofmeasuring either electrical current or electrical voltage is used tomeasure machine current and/or voltage information, further revealingmotor rotor and motor stator faults. Those skilled in the art recognizehow analog signals from these alternative sensors are processedfollowing the examples of vibration signal processing described herein.

In some embodiments, the digital high-pass filter and the digitalinfinite impulse response filter are implemented in a field programmablegate array (FPGA). The FPGA may include an embedded processor forcontrolling storage and processing of data associated the first digitalvibration signal or the second digital vibration signal. In otherembodiments, the digital high-pass filter and the digital infiniteimpulse response filter are implemented in an application specificintegrated circuit (ASIC).

BRIEF DESCRIPTION OF THE DRAWINGS

Further advantages of the invention are apparent by reference to thedetailed description in conjunction with the figures, wherein elementsare not to scale so as to more clearly show the details, wherein likereference numbers indicate like elements throughout the several views,and wherein:

FIG. 1 depicts an ideal real-time integrator according to an embodimentof the invention;

FIG. 2 depicts a band-limited real-time integrator according to anembodiment of the invention;

FIG. 3 depicts a frequency response curve for an IIR integrator and aband-limited analog integrator;

FIG. 4 depicts an ideal hardware integrator;

FIG. 5 depicts an band-limited hardware integrator;

FIG. 6 depicts an FFT vibration data processing system;

FIG. 7 depicts a conventional machine vibration measurement system inwhich signal conditioning functions are performed by analog components;

FIG. 8 depicts a multi-channel machine vibration measurement system inwhich signal conditioning functions are performed digitally in a fieldprogrammable gate array;

FIG. 9 depicts a multi-channel machine vibration measurement system inwhich signal conditioning functions are performed digitally in a fieldprogrammable gate array that includes an embedded processor; and

FIG. 10 depicts a circuit for providing power to a machine vibrationmeasurement system.

DETAILED DESCRIPTION

Real-Time Digital Integrator

The basic structure for an ideal real-time integrator system 10 isdepicted in FIG. 1. The ideal system 10 includes an analog-to-digitalconverter (ADC) 12 and an ideal integrator 14. The ideal integrator 14may be implemented using a difference equation which requires only onemultiply operation, two addition operations and one storage location perADC clock cycle. This difference equation is expressed as:

y _(n) :=y _(n-1) +A(x _(n) +x _(n-1)),   (1)

where y_(n) is the current output value, x_(n) is the current inputvalue, y_(n-1) is the previous output value and x_(n-1) is the previousinput value. In equation (1), A is a constant derived from theconversion factor.

The difference equation (1) may be derived by taking the idealintegrator transfer function in the s-domain (complex frequency domain)according to:

$\begin{matrix}{{H(s)}:=\frac{A}{s}} & (2) \\{where} & \; \\{s:={2 \cdot {\frac{\left( {1 - Z^{- 1}} \right)}{{t} \cdot \left( {1 + Z^{- 1}} \right)}.}}} & (3)\end{matrix}$

Applying the bilinear transform results in the following relationship:

$\begin{matrix}{{{X(Z)} \cdot {X\left( {1 + Z^{- 1}} \right)}}:=\frac{{Y(Z)} \cdot \left( {1 - Z^{- 1}} \right)}{A}} & (4)\end{matrix}$

Rearranging terms and applying the inverse Z transform results in thetime domain difference equation (1).

The difference equation (1) may be implemented in a digital signalprocessor (DSP) or general purpose processor as a first order IIRfilter. The problems inherent to the ideal integrator as described aboveare also found in the digital implementation. The infinite gain at DCamplifies low-frequency noise and offsets, and the constant ofintegration remains in the output sequence. Using the analogimplementation as a guide, the digital equivalent of the band-limitedintegrator can be created using the method described above. Theresultant difference equation is given by:

y _(n) =A·x _(n) +B·x _(n-2) +C·y _(n-1) +D·y _(n-2)   (5)

where x_(n-2) is the input value prior to x_(n-1), y_(n-2) is the outputvalue prior to y_(n-1), and A, B, C and D are constants determined bythe desired high-pass frequency and integrator conversion factor. Thisfilter requires four multiply operations, three addition operations andtwo storage locations per ADC clock cycle which can be efficientlyimplemented in most processors.

FIG. 2 depicts an embodiment of a signal conversion apparatus 16 whichimplements the filter of equation (5). This embodiment of the apparatus16 includes an ADC 12 and an infinite impulse response (RR) filtermodule 18. A time-domain analog vibration-related signal, such as anaccelerometer signal measured at some point of interest on a machine, isapplied to an input 13 of the ADC. The time-domain analogvibration-related signal could also be a velocity signal or adisplacement signal. The ADC 12 converts the analog vibration-relatedsignal into a first time-domain digital signal, x_(n), at the output 15of the ADC 12. The signal, x_(n), is provided to the filter module 18which generates a second time-domain digital signal, y_(n), at itsoutput according to the filter of equation (5).

As shown in FIG. 2, a preferred embodiment of the filter module 18includes a multiply operation 20 for implementing the A·x_(n) operation,a multiply operation 22 for implementing the B·x_(n-2) operation, amultiply operation 24 for implementing the C·y_(n-1) operation, and amultiply operation 26 for implementing the D·y_(n-2) operation. Thefilter module 18 also includes three addition operations 28, 30 and 32,and two unit delay storage operators 34 and 36.

The output of the filter module 18 is provided to a vibration analysissystem 40 which preferably comprises a computer processor 44, digitalstorage device 42 and display device 46. The vibration analysis system40 may be implemented in a handheld vibration analyzer, in a notebookcomputer, a desk top computer or server. The vibration analysis system40 receives the second time-domain digital signal, y_(n), which may bean acceleration signal, velocity signal or displacement signal, andprocesses the signal, y_(n), to provide machine vibration data in aformat that is useful to a machine vibration analyst. The processedmachine vibration data may be displayed on the display device 46 forobservation by the vibration analyst or stored on the storage device 42for subsequent processing or display.

It will be appreciated that the filter module 18 may be implemented in adigital signal processor, general purpose processor, or implementedentirely in hardware as in an FPGA or ASIC that is separate from theprocessor 44 of the vibration analysis system 40, or the filter module18 may be implemented in the processor 44.

In alternative embodiments of the invention, the first time-domaindigital signal, x_(n), at the output of the ADC 12 is stored in adigital storage device, such as the device 42, as the data is sampled.The stored signal, x_(n), may subsequently be processed by the filtermodule 18 to generate the second time-domain digital signal, y_(n). Inthis manner, the system 16 provides the ability to directly integrate ordifferentiate stored time-domain waveforms without resorting to FFTprocessing methods.

As will be appreciated by those skilled in the art, the topology for adifferentiator implementation of the filter 18 is substantiallyidentical to that depicted in FIG. 2, and only requires different valuesof the coefficients A, B, C and D.

For optimum results, the sampling data rate should be at least twice theNyquist frequency (Fs/2) due the frequency warping of the bilineartransform process. As shown in FIG. 3, the IIR implementation begins todeviate from the ideal case at about Fs/4. In practice, this is not asevere limitation, as over-sampling is often required for other relatedvibration analysis functions.

In summary, by implementing the integration function in the digital datastream, vibration units are efficiently transformed in real time withvery little data storage and with complete flexibility in the conversiontype.

Digital Vibration Signal Conditioning

FIG. 8 depicts a preferred embodiment of a multi-channel machinevibration measurement apparatus 80 that performs signal conditioningfunctions in the digital domain. In this embodiment, the analog frontend includes eight input sensors 82 a-82 d and 84 a-84 d. Although theinvention is not limited to any particular type of sensor, the sensors82 a-82 d are preferably accelerometers and the sensors 84 a-84 d arepreferably voltage sensors. In one embodiment, one or more of thesensors 82 a-82 d or 84 a-84 d are cameras for capturing visual imagesof a machine which is also being monitored for vibration using other ofthe sensors 82 a-82 d and 84 a-84 d. After each of the sensors 82 a-82 dand 84 a-84 d, the analog signal chain includes a differential amplifier85 a-85 h, a divide-by-3 circuit 86 a-86 h, differential amplifier pairs88 a 1-88 h 1 and 88 a 2-88 h 2, and low pass filters 90 a-90 h. Theseeight analog sensor channels are provided to the inputs of eight 24-bitsigma-delta analog-to-digital converters (ADC's) 92 a-92 h whosesampling rates are dictated by a fixed clock 94.

An eight-to-four cross-point switch 96 provides for switching any one ofthe eight channels at the outputs of the ADC's 92 a-92 h to any one offour digital processing channels 98 a-98 d of an FPGA 98. In FIG. 8, theFPGA channel 98 a is depicted in detail. In the preferred embodiment,the components of the channels 98 b, 98 c, and 98 d are identical to thecomponents of the channel 98 a. The FPGA channel 98 a includes ahigh-pass filter module 102, a first integrator module 106, a secondintegrator module 110, an arbitrary resampler module 114, a PeakVuemodule 116, an interpolator module 120, and a FIFO 124. The output ofthe FIFO 124 is provided to a processor 100.

The high-pass filter 102 removes the DC component of the signal at itsinput. The switch 104 provides for bypassing the high-pass filter 102for those applications in which the DC bias of a signal needs to bemeasured.

The first integrator 106 provides for integrating an acceleration signalto convert it into a velocity signal. In a preferred embodiment, thefirst integrator 106 is an IIR integrator that is structurally andfunctionally equivalent to the integrator 18 (in FIG. 2) describedabove. In alternative embodiments, the first integrator 106 mayimplement other integrator schemes which use other integrationalgorithms. The switch 108 provides for bypassing the first integrator106 for those applications in which the first stage of integration isnot desired.

The second integrator 110 provides for integrating a velocity signal toconvert it into a position signal. In a preferred embodiment, the secondintegrator 110 is an IIR integrator that is structurally andfunctionally equivalent to the first integrator 106. In alternativeembodiments, the second integrator 108 may implement other integratorschemes which use other integration algorithms. The switch 112 providesfor bypassing the second integrator 110 for those applications in whichthe second stage of integration is not desired. For example, the secondintegrator 110 may be bypassed when only the first integrator 106 isneeded to convert acceleration to velocity. Both integrators 106 and 110may be bypassed when the desired output is acceleration. Bothintegrators 106 and 110 may be used when the desired output isdisplacement.

In some embodiments, one or both of the integrators 106 and 110 in atleast one of the FPGA channels 98 a-98 d are operable to perform adouble integration of the vibration signal at its input. For example,the first integrator 106 may receive an acceleration signal and performa double integration to provide a displacement signal at its output. Inthis embodiment, the second integrator 110 may be bypassed using theswitch 112 so that the resampler 114 receives the displacement signalfrom the first integrator 106. In an alternative embodiment, the firstintegrator 106 may be bypassed using the switch 108 so that the secondintegrator 110 receives an acceleration signal, and the secondintegrator 110 performs a double integration to provide a displacementsignal at its output. In yet another embodiment, at least one of theFPGA channels 98 a-98 d includes only a single integrator that receivesan acceleration signal and performs a double integration to provide adisplacement signal at its output.

The arbitrary resampler 114 extracts some subset of data points from thedata stream at its input. For example, the resampler 114 may extractevery other data point or every third data point and discard the others.In some embodiments, the resampler 114 performs the functions of adecimator. The resampling factor is arbitrary in that it may be selectedby a user to provide the signal frequency components desired by the userfor a particular analysis application.

The PeakVue module 116 performs one or more processes for determiningpeak amplitude vibration values during predetermined sample timeperiods. These processes, which are referred to and widely known in theindustry as “PeakVue,” are described in U.S. Pat. No. 5,895,857 toRobinson et al., the entire contents of which are incorporated herein byreference. The switch 118 provides for bypassing the PeakVue module 116for those applications in which the desired output includes all datapoints in a sample period, and not just the peak amplitude values.

The interpolator 120 adds new data points between existing data pointsto recreate waveform details. This effectively increases the “samplerate” of the signal which is advantageous for some analysisapplications, such as orbital data analysis. The switch 122 provides forbypassing the interpolator 120 for those applications in which anincrease in sample rate is not needed.

The FIFO 124 allows the FPGA 98 to generate vibration data in real timewhile allowing the processor 100 to access the data asynchronously.

The processor 100 receives the vibration signal data from each of thefour FPGA channels 98 a-98 d and performs one or more vibration analysisfunctions, such as statistical analysis (RMS, standard deviation, crestfactor, etc.), other waveform analysis techniques suggested by Piety et.al. in U.S. Pat. No. 5,943,643, and FFT calculations. The processor 100also handles user interface and display functions. In alternativeembodiments, some or all of the functions performed by the processor 100may be performed by the FPGA 98.

In a preferred embodiment of the system of FIG. 8, the ADC's 92 a-92 hare very high quality 24-bit sigma-delta converters. The latestgeneration of these ADC's have dynamic ranges of greater than 120 dB andsignal-to-noise ratios greater than 110 dB. With this much dynamicrange, the entire voltage input range can be acquired with sufficientlyhigh resolution to eliminate the need for gain amplifiers and ACcoupling amplifiers (such as the amplifiers 62 and 66 of FIG. 7).Because the large dynamic range of the ADC's 92 a-92 h provides forresolving small AC signals superimposed on large DC offsets, sensoroutput signals can be directly coupled to the ADC's, and DC componentscan be removed by real-time digital filtering in the FPGA 98.

In prior multi-frequency designs, an analog front-end (such as depictedin FIG. 7) must implement some form of filter to ensure no aliasingoccurs at low ADC sampling frequencies. Typically, an analoganti-aliasing filter (such as 68 in FIG. 7) must have a sharp cutoff andvery little amplitude distortion to preserve the quality characteristicsof the ADC. These filters often dictate the overall amplitude and phaseaccuracy of the system.

In contrast, the ADCs implemented in the embodiments described hereinhave little or no anti-aliasing filter requirements at a fixedfrequency. Preferred embodiments of the present invention avoid thealiasing problems of prior analog designs by running the ADC's 92 a-92 hat a fixed clock frequency and synthesizing all other samples rates bydecimation and interpolation of the digital ADC data stream. Theanti-aliasing filter can then be replaced by a simple RC circuit at theinput of the ADC (such as the low pass filters 90 a-90 h shown in FIG.8) or, in some embodiments, eliminated altogether.

A further advantage of the embodiment of FIG. 8 is the reduction of thedata rate seen by the processor 100. This is particularly advantageousin multi-channel systems like the embodiment of FIG. 8 where theprocessor 100 handles multiple data streams. For high-speed processeslike the PeakVue application, offloading the bulk of the high-passfiltering and decimation to an FPGA reduces the interrupt rate to theprocessor by a factor of 20.

Because preferred embodiments of the device 80 are field programmable,an operator can completely reconfigure the device in the field to switchbetween (a) slow-speed technology (SST) processing (such as described inU.S. Pat. No. 5,646,350 to Robinson et al.) which prevents highfrequency components of an accelerometer signal from overwhelming lowfreqeuncy components as a result of dynamic range loss during processingof the accelerometer output, (b) PeakVue processing wherein a peakscalar value is determined for each measurment time interval, (c)triaxial sensor processing wherein signals from three accelerometersmounted in orthogonal orientations in a single sensor package aresimultaneously processed and wherein one such signal is simultaneouslyprocessed multiple ways for multiple purposes, and (d) normal vibrationanalysis wherein a sensor signal is processed in a frequency range ofinterest to detect and analyze possible machine fault conditions. Forexample, the FPGA may be reconfigured by the host processor 100 (oron-board processor 132 of FIG. 9) using firmware configuration filesstored in the device 80, or using files that are downloaded to thedevice 80 via a wireless link, a USB interface, or a nonvolatile memorycard (such as an SD card).

Preferred embodiments are also scalable. Although the exemplary device80 depicted in FIG. 8 provides eight measurement channels and four FPGAchannels, it will be appreciated that practically any number ofmeasurement channels and FPGA channels are possible with the appropriatecross-point switch. This is particularly advantageous for onlinevibration monitoring and machine shutdown protection systems. Invibration measurement systems, scalability means to the ability toincrease the number of processing channels (such as the channels 98 a-98d) in an efficient manner. In general, the cost per channel of an FPGAimplementation (in dollars, power consumption, and size) goes down asthe number of channels in the FPGA increases.

By elimination of sequential processing and discrete components,preferred embodiments such as shown in FIG. 8 significantly increase thespeed of vibration data processing as compared to sequential systemssuch as shown in FIG. 7. This speed increase results in a vibrationmeasurement system that is fast enough to comply with machine shutdownprotection standards such as those specified in American PetroleumInstitute (API) standard 670.

Also, through filtering and arbitrary resampling decimation, largeamounts of unneeded data are eliminated in the FPGA 98 of the preferredembodiment. This frees memory and computational resources in theprocessor 100 that would otherwise be tied up with data reduction tasks.

For transient data processing, each FPGA channel 98 a-98 d can perform aprocessing task that is completely independent of processing tasks beingperformed simultaneously in the other channels. This includes theability to select different processing bandwidths for each channel.

The preferred embodiment depicted in FIG. 8 is ideally suited forintegration of imaging analysis and dynamic signal analysis as describedin U.S. Pat. No. 7,561,200 to Garvey et al (the '200 patent),incorporated entirely herein by reference. Embodiments of the presentinvention are purposely suited for simultaneous parallel processing. Inone such parallel circuit path, images are received and stored, andindications of equipment health are derived from such imagery. Exampleimages include (a) thermal imagery revealing temperature indications,(b) bore sighted imagery revealing machine component operation andcomponent defect information, (c) visible inspection imagery revealingphysical condition and movement and proximity of subassemblies, and (d)variable speed imagery revealing strobe-synchronous operation.Simultaneously on a parallel circuit path, an instrument according to apreferred embodiment receives dynamic sensor data and further derives adynamic indication of equipment health. Example dynamic sensor datainclude (a) vibration sensor output, (b) motor current informationmeasured directly or indirectly using a current clamp, (c) motor fluxinformation measured using a flux coil, and (d) ultrasonic sensoroutput. FPGA and ASIC circuits of the present invention are well suitedto simultaneously process these parallel processes, permittingcorrelation between an imagery indication of equipment health and asimultaneous dynamic signal indication of equipment health. Exemplaryimagery indications of equipment health and dynamic signal indicationsof equipment health are described in the '200 patent in column 6, line 1to column 7, line 18. A correlation between imagery and dynamicindications of equipment health, or lack of such correlation, isvaluable to the analyst because they provide totally independent viewsof machine health. When both or neither give similar problematicindication, likelihood of correctness is high, often justifying promptaction possibly without further verification. When they produceddissimilar problematic indications, then an operator is inclined to lookfor further verification before taking action with expensiveconsequence.

As discussed above, each of the processing functions associated with theFPGA embodiment of FIG. 8 may also be implemented in an ApplicationSpecific Integrated Circuit (ASIC) embodiment. An ASIC embodimentprovides for implementation of smart sensor concepts as described inU.S. Pat. No. 6,138,078 to Canada et al. (the '078 patent), and in U.S.Pat. No. 5,854,994 to Canada et al. (the '994 patent), where smallcircuit board footprint, high speed processing, low power consumption,and low cost are critical factors.

Whether implemented in FPGA or ASIC configuration, embodiments of thepresent invention reduce circuit size and rate of power consumption,thereby reducing package size and installed cost. All of these factorsare critical enabling aspects for widespread acceptance and deploymentof a monitor with tethered sensors as described in the '078 patent, orof stand-alone wireless monitors as described in the '994 patent. Lowpower consumption is crucial for these remote monitors, whether they arebattery powered or their power is supplemented using an energyharvesting technique such as vibration energy harvesting, examples ofwhich are PGM-series power solutions from Perpetuum (www.perpetuum.com)and Joule-Thief™ Capacitive EHD Modules available from AdaptiveEnergy(www.RLPenergy.com). In energy harvesting applications, calculationsperformed in an FGPA or ASIC could be made to determine at whichfrequencies the peak vibration energy is located. Based on thisdetermination, electrical characteristics of the energy harvestingsystem may be automatically adjusted to cause the energy harvestingsystem to access the vibration energy from those peak frequencies.

Smaller package size improves usefulness and sometimes even viabilityfor stand-alone monitors mounted wherein meaningful mechanicalvibrations over a range of frequencies must be sensed through a physicalconnection between each monitor housing and a machine surface, such asthe attachment means described in the '994 patent which is depicted as404 on FIG. 2 of the '994 patent. The present invention deliverssignificant advantage for a wireless machine mounted vibration monitorregarding power consumption, package size and unit cost; wherein thesize, component count, and supporting resource requirements for circuitshown in FIG. 6 of the '994 patent are substantially reduced and byremoving the analog AMP 412 and analog FILTER 414 and performing theseprocesses in the digital domain using an FPGA or ASIC based circuit ofthe present invention in place of the DATA PROCESSOR 420 of the COMPUTER418 shown in FIG. 6 of the '994 patent.

In addition to the stationary plurality of machine monitors as depictedby Canada et al in FIG. 1 of '994, the present invention can be used inform of a route-based walk-around sensor wherein a wirelesscommunication technique, for example Bluetooth or other radio frequencycommunication, is used to transmit digital data from the sensor, therebyreplacing traditional cabled analog signal communication. Instead ofinstalling nine stationary monitors like 4a to 4i from FIG. 1 of '994,in the walk-around sensor user may use a single sensor to collect datafrom these nine locations and others if called for. There are at leasttwo options for receiving vibration data from such a walk-around sensor:the vibration data may be received by an operator carried (in hand, onwrist, on clothing, or with gear) wireless transceiver, or it may betransmitted along paths like what is outlined in FIG. 1 of '994.

With the available speed and flexible processing options provided bypreferred embodiments of the invention, PeakVue and SST processing maybe enhanced. By replacing external analog hardware with its digitalequivalent in an FPGA, it is possible to change the signal processingparameters adaptively. For example, though it is difficult to changecorner frequencies on an analog integrator, this is a trivial change foran integrator implemented as a filter in an FPGA. PeakVue, which is ascalar peak value determination methodology often used to characterizestress waves produced by impacting, can be enhanced using embodiments ofthe invention by determining information in addition to the scalarvalue, such as peak-rise characteristic, peak-fall characteristic, otherpeak shape aspects, and information regarding peaks nearby to themaximum peak. Acquisition of such information is not practical usingprior art peak detection techniques.

Yet another advantage of eliminating analog signal conditioningcircuitry is the elimination of any need to do drift or calibrationcompensation which is normally required with this analog circuitry.

Further advantages of FPGA technology in vibration monitoring systemsinclude the following.

-   -   Its parallel nature provides for performing many types of data        analysis simultaneously in parallel paths. This aspect of the        present invention is advanced beyond the systems described by        Piety et al in U.S. Pat. No. 5,965,819 wherein multiple ADCs and        multiple processors are used to simultaneously process multiple        signals from one sensor. It is also advanced beyond the systems        described by Leigh in U.S. Patent Application 2006/0150738        wherein a processor sequentially, not simultaneously, processes        multiple signals from a single sensor.    -   As semiconductor technology evolves, FPGA technology insulates        hardware designs from obsolete component issues.    -   Using FPGAs, signal processing can be tailored for a particular        application with a high degree of precision. For example, it is        possible to arbitrarily define the bit width of the data        processing in an FPGA to match resolution requirements of a        particular measurement. Using conventional technology, bit width        choices are limited to predefined values, such as 8-bit, 16-bit,        and 24-bit.

FIG. 9 depicts another embodiment of a multi-channel machine vibrationmeasurement apparatus 80 that performs signal conditioning functions inthe digital domain. This embodiment is substantially the same as theembodiment of FIG. 8 except that the FPGA 98 includes an embeddedprocessor 132 for controlling the storage and processing of thevibration data from the FPGA channels 98 a-98 d. The analog components85 a, 85 b, 86 a, 86 b, 88 a 1, 88 a 2, 88 b 1, 88 b 2, 90 a, and 90 bdepicted in FIG. 8 are represented in FIG. 9 by the “analog front end”blocks 130 a and 130 b. Although the other sensor analog channels andADC's of FIG. 8 are included in the embodiment of FIG. 9, they are notdepicted in FIG. 9 to simplify the drawing.

In a preferred embodiment, the embedded processor 132 of FIG. 9 alsocontrols a user display device 136 and controls communications with anexternal communication network 138, such as an Ethernet, serial, or HARTnetwork.

FIG. 10 depicts a preferred embodiment of a circuit for providing powerto a vibration measurement apparatus, such as the apparatus 80 shown inFIGS. 8 and 9. This circuit is particularly beneficial when theapparatus 80 is implemented as a wireless vibration measurementapparatus. The circuit implements a hybrid combination of an energyharvester 146 and a non-rechargeable battery B1 which does not usetraditional energy storage in advance of a DC/DC conversion step. Ingeneral, the circuit supplements the power of the primary battery cell(or cells) B1 with power from the energy harvestor 146.

As shown in the embodiment of FIG. 10, the positive terminal of thenon-rechargeable battery 131 drives the anode side of a discrete diode,or of an active diode circuit 142, as is shown in simplified form. Whenthe voltage V1 on the anode side is greater than the voltage V2 on thecathode side, current flow can occur through the active diode 142. Whenthe voltage V2 is greater than the voltage V1, current flow through thediode 142 is prohibited. Power from the energy harvestor 146 feeds asimple voltage booster consisting of inductor L1, diode D1, siliconswitch Q1, and switch control circuitry 144. Although ametal-oxide-semiconductor field-effect transistor (MOSFET) switch Q1 isused in this embodiment, other device types, such as a bipolartransistor, could alternatively be employed. The availability of primarycell power simplifies the design of the switch control circuitry 144, asno bootstrapping is required, even for cases of very low voltagescavenged energy from the energy harvestor 146. The switch controlcircuitry 144 can optionally be disabled when scavenged energy is notavailable, thereby conserving power. Capacitors C1 and C2 providefiltering for the switching activity. Zener diode Z1 sets the maximum ofthe voltage V2 to some value higher than the voltage V1 of the primarycell B1. When the energy requirement of the vibration measurementapparatus 80 is less than the power available from the energy harvestor146, the voltage V2 rises above the voltage V1, and no power is drawnfrom the primary cell B1. When the power requirement of the vibrationmeasurement apparatus 80 is greater than the power available from theenergy harvestor 146, the voltage V2 falls below the voltage V1, and theadditional needed power is drawn from the cell B1.

In the presence of the hysteresis, and based on comparator tolerances,reverse diode flow through the active diode 142 may be possible. In someembodiments, the active diode 142 includes a small amount of positivefeedback for hysteresis and possibly a small added offset voltage forpreventing such reverse diode flow.

The energy harvester 146 may consist of piezoelectric crystals or fibersthat generate a small voltage when they are mechanically deformed, suchas due to vibration from a machine on which the energy harvester 146 ismounted. The energy harvester 146 may also be a solar panel, or athermoelectric generator (TEG) formed by the junction of two dissimilarmaterials in the presence of a thermal gradient. Typically, such energyharvesters produce low power which must be accummulated in an energystorage device such as a super capacitor or a rechargeable battery oranother component. The circuit of FIG. 10 eliminates this energy storagestep. If the live energy from the energy harvester 146 is sufficient tocarry the load, then it is used. If the live energy from the energyharvester 146 is not sufficient to entirely carry the load, then aswitch is performed and the battery B1 supplies the entire load untilthe load requirement can again be met by the energy harvester 146.

Preferably, the battery B1 is a non-rechargeable battery, such as aTidran Lithium battery which provides very reliable and long-shelf-lifeenergy in an industrial environment. The size of the battery B1 ispreferably determined based on the maximum power spikes neededintermittently. An exemplary wireless vibration monitoring device, suchas the CSI 9420 from Emerson Process Management, is likely to be inlow-power or sleep mode for more than 99.9% of life and will requirebattery power for less than 0.1% of life.

The foregoing description of preferred embodiments for this inventionhave been presented for purposes of illustration and description. Theyare not intended to be exhaustive or to limit the invention to theprecise form disclosed. Obvious modifications or variations are possiblein light of the above teachings. The embodiments are chosen anddescribed in an effort to provide the best illustrations of theprinciples of the invention and its practical application, and tothereby enable one of ordinary skill in the art to utilize the inventionin various embodiments and with various modifications as are suited tothe particular use contemplated. All such modifications and variationsare within the scope of the invention as determined by the appendedclaims when interpreted in accordance with the breadth to which they arefairly, legally, and equitably entitled.

What is claimed is:
 1. A real-time signal conversion apparatus for usein measuring vibration levels of a machine that are indicative of amachine fault condition or a machine performance, the signal conversionapparatus comprising: a vibration sensor for producing an analogvibration signal comprising a dynamic vibration signal component and adirect current (DC) signal component, wherein at least the analogvibration signal component is indicative of performance of the machineor a fault condition of the machine; an analog-to-digital conversion(ADC) circuit for sampling the analog vibration signal at an input datarate to convert the analog vibration signal into a first digitalvibration signal, the ADC circuit having a dynamic range to enableremoval of the DC signal component by real-time digital filtering; and adigital infinite impulse response filter for receiving the first digitalvibration signal at the input data rate and performing a mathematicaloperation at the input data rate on the first digital vibration signalto generate a second digital vibration signal substantially in realtime, wherein the second digital vibration signal is indicative of thevibration level of the machine, and wherein the mathematical operationis selected from the group consisting of an integration operation and adifferentiation operation.
 2. The real-time signal conversion apparatusof claim 1 wherein the analog-to-digital conversion circuit converts theanalog vibration signal into a plurality of first input data values ofthe first digital vibration signal during a first period of time definedby a plurality of ADC clock cycles at the input data rate; and thedigital infinite impulse response filter generates a plurality of firstoutput data values of the second digital vibration signal during thefirst period of time.
 3. The real-time signal conversion apparatus ofclaim 1 wherein: the analog-to-digital conversion circuit generates aplurality of input data values of the first digital vibration signal;and the digital infinite impulse response filter performs themathematical operation on the plurality of input data values of thefirst digital vibration signal to generate a plurality of output datavalues of the second digital vibration signal according to:y _(n) =A·x _(n) +B·x _(n-2) +C·y _(n-1) +D·y _(n-2) where y_(n) is annth output data value of the second digital vibration signal, y_(n-1) isan output data value of the second digital vibration signal prior tooutput data value y_(n), y_(n-2) is an output data value of the seconddigital vibration signal prior to y_(n-1), x_(n) is an nth input datavalue of the first digital vibration signal, x_(n-1) is an input datavalue of the first digital vibration signal prior to x_(n), x_(n-2) isan input data value of the first digital vibration signal prior tox_(n-1), and A, B, C and D are constants.
 4. The real-time signalconversion apparatus of claim 1 wherein the input data rate at which theanalog-to-digital conversion circuit samples the analog vibration signalis at least twice the Nyquist frequency of the analog vibration signalso that the second digital vibration signal generated by the digitalinfinite impulse response filter is substantially equivalent to anoutput of a band-limited analog infinite impulse response filter.
 5. Thereal-time signal conversion apparatus of claim 1 wherein the digitalinfinite impulse response filter is implemented in a field programmablegate array (FPGA).
 6. The real-time signal conversion apparatus of claim5 wherein the FPGA includes an embedded processor for controllingstorage and processing of data associated with at least one of the firstdigital vibration signal and the second digital vibration signal.
 7. Thereal-time signal conversion apparatus of claim 1 wherein the digitalinfinite impulse response filter is implemented in an applicationspecific integrated circuit (ASIC).
 8. The real-time signal conversionapparatus of claim 7 wherein the ASIC includes an embedded processor forcontrolling storage and processing of data associated with at least oneof the first digital vibration signal and the second digital vibrationsignal.
 9. A method for measuring vibration levels of a machine that areindicative of a machine fault condition or a machine performance, themethod comprising: (a) sensing vibration of the machine and generatingan analog vibration signal based on the sensed vibration; (b) samplingthe analog vibration signal at a fixed sampling rate to generate a firstdigital vibration signal; (c) synthesizing other sampling rates based onthe fixed sampling rate of the first digital vibration signal, therebyeliminating any need for an anti-aliasing filter; (d) high-passfiltering the first digital vibration signal to remove direct current(DC) components; and (e) performing a first mathematical operation onthe first digital vibration signal to generate a second digitalvibration signal that is indicative of the vibration level of themachine,.
 10. The method of claim 9 further comprising performing asecond mathematical operation on the second digital vibration signal togenerate a third digital vibration signal that is indicative of thevibration level of the machine, wherein the second mathematicaloperation is selected from the group consisting of an integrationoperation and a differentiation operation.
 11. The method of claim 9wherein at least steps (d) and (e) are performed in a field programmablegate array (FPGA).
 12. The method of claim 9 wherein at least steps (d)and (e) are performed in an application specific integrated circuit(ASIC).
 13. The method of claim 9 wherein no signal conditioning step isperformed between steps (a) and (b), wherein the signal conditioningstep is selected from the group consisting of gain amplification, DCremoval, anti-aliasing filtration, and high-pass filtration.
 14. Areal-time signal conversion apparatus for use in measuring vibrationlevels of a machine that are indicative of a machine fault condition ora machine performance, the signal conversion apparatus comprising: avibration sensor for sensing vibration of the machine and generating ananalog vibration signal based on the sensed vibration, wherein theanalog vibration signal is indicative of performance of the machine or afault condition of the machine; an analog-to-digital conversion (ADC)circuit for sampling the analog vibration signal to generate a firstdigital vibration signal; a digital high-pass filter for filtering thefirst digital vibration signal to remove direct current (DC) components;and a digital infinite impulse response filter for performing amathematical operation on the first digital vibration signal to generatea second digital vibration signal that is indicative of the vibrationlevel of the machine, wherein the analog vibration signal is provided tothe analog-to-digital conversion circuit without gain amplification andwithout anti-aliasing filtration.
 15. The real-time signal conversionapparatus of claim 14 wherein the digital high-pass filter and thedigital infinite impulse response filter are implemented in a fieldprogrammable gate array (FPGA).
 16. The real-time signal conversionapparatus of claim 15 wherein the FPGA includes an embedded processorfor controlling storage and processing of data associated with at leastone of the first digital vibration signal and the second digitalvibration signal.
 17. The real-time signal conversion apparatus of claim14 wherein the analog-to-digital conversion circuit samples the analogvibration signal at an input data rate converts the analog vibrationsignal into a plurality of first input data values of the first digitalvibration signal during a first period of time defined by a plurality ofADC clock cycles at the input data rate; and the digital infiniteimpulse response filter generates a plurality of first output datavalues of the second digital vibration signal during the first period oftime.
 18. The real-time signal conversion apparatus of claim 17 whereinthe input data rate at which the analog-to-digital conversion circuitsamples the analog vibration signal is at least twice the Nyquistfrequency of the analog vibration signal so that the second digitalvibration signal generated by the digital infinite impulse responsefilter is substantially equivalent to an output of a band-limited analoginfinite impulse response filter.
 19. A real-time signal conversionapparatus for use in measuring vibration levels of a machine that areindicative of a machine fault condition or a machine performance, thesignal conversion apparatus comprising: a vibration sensor for sensingvibration of the machine and generating an analog vibration signal basedon the sensed vibration, wherein the analog vibration signal isindicative of performance of the machine or a fault condition of themachine; an analog-to-digital conversion (ADC) circuit for sampling theanalog vibration signal to generate a first digital vibration signal; adigital infinite impulse response filter for performing a mathematicaloperation on the first digital vibration signal to generate a seconddigital vibration signal that is indicative of the vibration level ofthe machine; a non-rechargeable battery for providing power at a firstpower level to the apparatus; an energy harvester for providing power ata second power level to the apparatus, wherein the second power level issubstantially less than the first power level; and switch controlcircuitry for switching between the non-rechargeable battery and theenergy harvester based at least in part on power demands of theapparatus, wherein the switch control circuitry provides power from theenergy harvester to the apparatus when the second power level issufficient to power the apparatus, and for providing power from thenon-rechargeable battery to the apparatus when the second power level isnot sufficient to power the apparatus.
 20. A real-time signal conversionapparatus for use in measuring parameters of a machine that areindicative of a machine fault condition or a machine performance, thesignal conversion apparatus comprising: a first sensor for sensing afirst parameter of the machine and generating a first analog signalbased on the sensed parameter, wherein the first analog signal isindicative of performance of the machine or a fault condition of themachine; a second sensor for sensing a second parameter of the machineand generating a second analog signal based on the sensed vibration,wherein the second analog signal is indicative of performance of themachine or a fault condition of the machine; one or moreanalog-to-digital conversion (ADC) circuits for sampling the first andsecond analog signals to generate a first digital signal based on thefirst analog signal and a second digital signal based on the secondanalog signal; a field programmable gate array (FPGA) having multiplechannels for processing multiple digital signals in parallel, themultiple channels including: a first FPGA channel for processing one ormore of the first digital signal and the second digital signal; and asecond FPGA channel for processing one or more of the first digitalsignal and the second digital signal.
 21. The real-time signalconversion apparatus of claim 20 further comprising a switching deviceoperable in a first setting for providing the first digital signal tothe first FPGA channel and the second digital signal to the second FPGAchannel, and operable in a second setting for providing the firstdigital signal to the second FPGA channel and the second digital signalto the first FPGA channel.
 22. The real-time signal conversion apparatusof claim 20 wherein the first sensor is a vibration sensor for sensing avibration level of the machine, the first analog signal is an analogvibration signal, and the first digital signal is a digital vibrationsignal; the second sensor is a camera for sensing a visual image of themachine, the second analog signal is an analog visual image signal, andthe second digital signal is a digital image signal.
 23. A real-timesignal conversion apparatus for use in measuring parameters of a machinethat are indicative of a machine fault condition or a machineperformance, the signal conversion apparatus comprising: at least oneacceleration sensor for sensing an acceleration parameter of the machineand generating an analog acceleration signal based on the sensedacceleration parameter, wherein the analog acceleration signal isindicative of performance of the machine or a fault condition of themachine; one or more analog-to-digital conversion (ADC) circuits forsampling the analog acceleration signal to generate a digitalacceleration signal based on the analog acceleration signal; a fieldprogrammable gate array (FPGA) having multiple channels for processingmultiple digital signals in parallel, the multiple channels including: afirst FPGA channel for performing a first integration process to derivea digital displacement signal from the digital acceleration signalwithout producing an intermediate velocity signal during the firstintegration process; and a second FPGA channel for performing a secondintegration process to derive a digital velocity signal from the digitalacceleration signal.
 24. The real-time signal conversion apparatus ofclaim 23 further comprising a processor for processing one or more ofthe digital acceleration signal, the digital velocity signal, and thedigital displacement signal to analyze a machine fault condition ormachine performance.
 25. A real-time signal conversion apparatus for usein measuring parameters of a machine that are indicative of a machinefault condition or a machine performance, the signal conversionapparatus comprising: a plurality of sensors for sensing vibrationparameters of the machine and generating a plurality of analog vibrationsignals based on the sensed vibration parameters, wherein the analogvibration signals are indicative of performance of the machine or afault condition of the machine; one or more analog-to-digital conversion(ADC) circuits for sampling the plurality of analog vibration signals togenerate a plurality of digital vibration signals based on the pluralityof analog vibration signals; a switching device having a plurality ofinputs and a plurality of outputs, the plurality of inputs for receivingthe plurality of digital vibration signals generated by the one or moreADC circuits, the switching device operable to direct any one of theplurality of digital vibration signals at any one of the plurality ofinputs to any one of the plurality of outputs, a field programmable gatearray having a plurality of channels connected to the plurality ofoutputs of the switching device, the plurality of channels forprocessing the plurality of digital vibration signals in parallel.